Senior/Principal RF/Analog IC Design Engineer [HSE RFIC]

  • Date Added: July 24th, 2020

The IC Design Engineer is to work on the specification, architecture design and circuit design of key circuits and sub-systems of integrated RF transceivers for the next generation of satellite communications in various deep sub-micron technologies.

Technical Responsibilities:

  • Responsible for design of a complex transceiver blocks (currently in Ku band) in BiCMOS,22nM FDSOI process or other technologies.
  • Hands-on block-level and architecture-level design of various blocks such as LNA, Mixer, TIA, Filter, PA, Opamps, LO and Filters
  • Delivering highly competitive RF/Analog blocks with leading edge performance using innovative architectures and circuit implementations.
  • Work closely with the layout team on IP floor-planning, trial layout design, parasitic extraction and modifications.
  • Co-ordinate design activities with other colleagues and possible contractors.
  • Collaborate with CAD, process technology, package design and Antenna teams
  • Document own work and participate in design reviews
  • Provide broad technical expertise and mentor junior team members

Organisational Responsibilities:

  • Ongoing development of core competencies & technical skills
  • Receptive and agile to the project needs.
  • Good estimation of timescales for projects & sub tasks
  • Follow good engineering practices including processes, documentation, tools & automation.
  • Identify risks, flag issues in a timely manner so project milestones remain on schedule.

Qualifications & Skills:


  • An Engineering degree in a relevant discipline
  • Minimum of 5 years experience in RF, Analog and Mixed-Signal IC design (preferably up to 15GHz operating frequencies)
  • Excellent understanding of state-of-the-art RF CMOS circuit design and transceiver architectures
  • Experience of designing high performance RF circuits in deep sub-micron technology as well as a strong analytical approach with a clear track record of success and delivery
  • Advanced Cadence Virtuoso Design Framework Experience
  • Ability to work and interact with engineering teams across multiple disciplines during ASIC project stream development
  • Great communication skills and able to take responsibility for complex circuit and system designs and delivery to tight timescales
  • Experience on Layout design and strategy overview


  • Experience on circuit design on 22nm FDSOI, and BICMOS process nodes for RF, Analogue and Mixed-Signal IPs
  • Experience on EM modelling using RFPro/EMX tools
  • Experience on mmw RF IC design
  • Experience on Class-AB LNA design and Class-E RF PA
  • Understanding of Radio systems, gain and noise budgeting, phase noise and intermodulation mechanisms
  • Experience on ESD design and strategy overview
  • Experience on Cadence/Calibre verification tools
  • Experience on revision control tools

Our Office:

Hanwha Phasor Ltd's UK Technology Centre is based in modern, open plan offices with great views, in the vibrant area of Hatton Garden, London.  

For transport we have excellent connections, with Farringdon, City Thameslink and Kings Cross St Pancras over ground stations within walking distance, and Chancery Lane and Farringdon tube stations within a 5-minute walk.

There are showers, cycle racks, lockers and a coffee shop on site.

A number of networking and social events run throughout the year.

We are within easy walking distance of the City, Covent Garden and Embankment – there’s plenty to do at lunchtimes and after work.

Leather Lane food market is right on our doorstep with a range of diverse food on offer. The usual chains are also close by, so we really are spoilt for choice.


  • Competitive salary
  • Bonus scheme
  • Contributory pension
  • 25 days holiday (plus recognised public holidays) and holiday purchase scheme
  • Flexible working 
  • Season ticket loan
  • Cycle to work scheme